Summer 2014 ASSIGNMENT
PROGRAM
- MCA (REVISED FALL 2012)
SEMESTER
- SECOND
SUBJECT
CODE & NAME - MCA2050- COMPUTER ARCHITECTURE
CREDIT 4, BK ID - B1648, MAX. MARKS 60
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Q1. Explain the concepts
of concurrent and parallel execution. 5+5
Answer:
Concepts of Concurrent and Parallel Execution
Concurrent execution is the temporal behaviour of the N-client 1-server
model where one client is served at any given moment. This model has a dual
nature; it is sequential in a small time scale, but simultaneous in a rather
large time scale. In this situation, the key problem is how the competing
clients, let us say processes or threads, should be scheduled for service
(execution) by the single server (processor). The scheduling policy may be
viewed as covering the following two aspects:
Q2. Explain briefly the
types of pipelining. 5+5
Answer:
Types of Pipelining
Pipelines are of two types - Linear and Non-linear.
(a) Linear pipelines: These pipelines perform only one
pre-defined fixed functions at specific times in a forward direction from one
stage to next stage. A linear pipeline can be visualised as a collection of
processing segments, where each segment completes a part of an instruction. The
result obtained from the processing in each segment is transferred to the next
segment in the pipeline. As in these pipelines, repeated evaluations of the
same function are performed with different data for some specified period of
time,
Q3. Explain the Tumasulo
approach. Write the differences between Tomasulo’s scheme and score boarding.
6+4
Answer:
The Tumasulo algorithm
It was formulated for IBM 360/91 in 1967; approximately three years
later to CDC 6600. This algorithm emphasises on the FPUs, in relation to a
pipelined FPU for DLX. The key distinction between DLX and the IBM360 is that
IBM 360 processor contains register-
Q4. Explain the concept of
branch handling. What is delayed branching? 5+5= 10
Answer:
Branch Handling
Branch is a flow altering instruction that is required to be handled
in a special manner in pipelined processors. Branch instruction’s impact on the
pipeline is shown in figure as below:
Q5. Explain any five types
of vector instructions in detail.5*2= 10
Answer: Types of Vector Instructions:
(a) Vector-scalar
instructions: Using these instructions, a scalar operand can be combined
with a vector one. If A and B are vector registers and f is a function that
performs some operation on each element of a single or two vector operands, a
vector-
Q6. Write short notes on:
a) UMA
b) NUMA 5+5= 10
Answer:
a)
UMA
(Uniform Memory Access):
In this category every processor
and memory module has similar access time. Hence each memory word can be read
as quickly as other memory word. If not then quick references are
Get fully solved assignment, plz drop a mail with your
sub code
computeroperator4@gmail.com
Charges rs 125/subject and rs 700/semester only.
our website is www.smuassignment.in
if urgent then call us on 08791490301, 08273413412
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