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Spring 2015
ASSIGNMENT
PROGRAM - MCA (REVISED
FALL 2012)
SEMESTER - SECOND
SUBJECT CODE
& NAME - MCA2050- COMPUTER ARCHITECTURE
CREDIT 4, BK ID - B1648, MAX. MARKS 60
Q1. Explain the concepts of concurrent and
parallel execution. 5+5
Answer:
Concepts of Concurrent and Parallel Execution
Concurrent execution is the temporal behaviour of
the N-client 1-server model where one client is served
Q2. Explain the any five types of
addressing modes. 5*2= 10
Answer:
Every instruction of a computer
states an operation on certain data. There are a numerous ways of specifying
address of the data to be operated on. These different ways of specifying data
are called the addressing modes In addition to stating registers and constant
operands,
Q3. Describe the logical layout of both
RISC and CISC computers 5+5= 10
Answer:
While processing operates
instructions, RISC pipelines have to cope only with register operands. By
contrast, CISC pipelines must be able to deal with both register and memory
operands as well as destinations.
Pipeline in RISC
Q4. Explain the concept of branch handling.
What is delayed branching? 5+5= 10
Answer:
Branch Handling
Branch is a flow
altering instruction that is required to be handled in a special manner in
pipelined processors. Branch
Q5. Explain any five types of vector
instructions in detail.5*2= 10
Answer: Types of Vector Instructions:
(a) Vector-scalar instructions: Using these instructions, a
scalar operand can be combined w
Q6. Write short notes on:
a) UMA
b) NUMA 5+5= 10
Answer:
a)
UMA
(Uniform Memory Access):
In this category every
processor and memory module has similar access time. Hence each memory word can
be read as quickly as other memory word. If not then quick references are
slowed down to match the slow ones, so that programmers cannot find the
difference this is called Get fully solved
assignment. Buy online from website
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store
or
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drop a mail with your sub code
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625/semester only.
if
urgent then call us on 08791490301, 08273413412
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