bt0072 smu bsc it Winter 2014 IInd sem assignment

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PROGRAM BSC IT

SEMESTER 2

SUBJECT CODE &

NAME

BT0072, COMPUTER NETWORKS

Qus:1 What is Message switching and Packet switching?

Answer:

Message switching:

Message switching was the precursor of packet switching, where messages were routed in their entirety and one hop at a time. It was first introduced by Leonard Kleinrock in 1961. Message switching systems are nowadays mostly implemented over packet-switched or circuit-switched

Qus:2 What is Framing? Briefly explain Fixed-Size Framing, Variable Size Framing.

Answer:

Framing:

Data transmission in the physical layer means moving bits in the form of a signal from the source to destination. The physical layer provides bit synchronization to ensure that the sender and receiver use the same bit durations and timing.

Qus:3 What is Stop-and-Wait Automatic Repeat Request? Briefly explain.

Answer:

Stop-and-Wait Automatic Repeat Request:

This protocol adds a simple error control mechanism to the stop-and-wait protocol. To detect and correct corrupted frames, we need to add redundancy bits to our data frame. When the frame arrives at the receiver site, it is checked and if it is corrupted, it is silently discarded. The detection of errors in this protocol is manifested by the silence of the receiver. Lost frames are

Qus:4 What is the role of Internet Protocol version 4 (IPV4) in addressing and routing packets between hosts? Briefly explain the structure of an IPV4 packet.

Answer:

The role of Internet Protocol version 4 (IPV4) in addressing and routing packets between hosts:

IPV4 is a datagram protocol primarily responsible for addressing and routing packets between hosts. IPV4 is connectionless, which means that it does not establish a connection before exchanging data, and unreliable, which means that it does not guarantee packet delivery. IPV4

Qus:5 Explain the working and applications of SMTP..

Answer:

SMTP works:

SMTP is based on end-to-end delivery: An SMTP client contacts the destination host's SMTP server directly, on well-known port 25, to deliver the mail. It keeps the mail item being transmitted until it has been successfully copied to the recipient's SMTP. This is different from

6. Describe Caching and TTL. How it is useful in query resolving?

Answer:

When a server is processing a recursive query, it might be required to send out several queries to find the definitive answer. The server caches all of the information that it receives during this process for a time that is specified in the returned data. This amount of time is referred to as the

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bt0071 smu bsc it Winter 2014 IInd sem assignment

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PROGRAM

BSC(IT)

SEMESTER

SECOND

SUBJECT CODE & NAME

BT0071- TECHNICAL COMMUNICATION

Q1. What’s Audience Analysis? Explain its significance in Technical Communication. [5+5] [10]

Answer:  Audience analysis is the process of examining information about your listeners. That analysis helps you to adapt your message so that your listeners will respond as you wish.

In everyday conversations you adapt your message to your audience. For example, if you went

Q2. Explain the role of a technical editor. Differentiate between Micro and Macro editing. [5+5] [10]

Answer: Role of a Technical Editor

A technical document, to be effective, requires not only a good writer, but also a good editor. The chief duties of a technical editor are realized when the sections of a technical document are submitted to him. The main duties that he performs include: Improving text material: The editor

Q3. Explain the various phases involved in System Development Life Cycle (SDLC). [5*2] [10]

Answer:

SDLC Phases

1 Feasibility

The feasibility study is used to determine if the project should get the goahead. If the project is to proceed, the feasibility study will produce a project plan and budget estimates for the future stages of development.

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bt0070 smu bsc it Winter 2014 IInd sem assignment

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[Winter 2014] ASSIGNMENT

PROGRAM BSc IT

SEMESTER SECOND

SUBJECT CODE & NAME BT0070, Operating Systems

CREDIT 4 BK ID B0954 MAX. MARKS 60

1. Describe batch operating system. Explain its advantages and disadvantages. 10

Answer: In early days computer work was given on punch cards and then these punch cards behave as input to the computer. These jobs or batch jobs were then executed by the computer one by one. So that computers were called as batch computers or batch systems. The work done by batch systems are in parts

2. Write short notes on:

1. Critical section problem

2. Buffering 5+5 10

Answer:

1. The critical-section problem

A critical-section is a part of program that accesses a shared resource (data structure or device) that must not be concurrently accessed by more than one process of execution. Consider a system consisting of n processes { p0,p1,……pn-1}. Each process has a segment of code called a critical

3 What are TLBs? Why they are required in paging? 3+7 10

Answer:

A translation lookaside buffer (TLB) is a cache that memory management hardware uses to improve virtual address translation speed. The majority of desktop, laptop, and server processors

4. Describe the techniques of free space management of free space list. 10 10

Answer:

The disk is a scarce resource. Also disk space can be reused. Free space present on the disk is maintained by the operating system. Physical blocks that are free are listed in a free-space list. When a file is created or a file grows, requests for blocks of disk space are checked in the free-

5 What are computer viruses? How do they affect our system? 3+7 10

Answer:

A computer virus is written with an intention of infecting other programs. It is a part of a

6. List and explain the types of multiprocessor OS.

Answer:

Three basic types of multiprocessor operating systems are:

·         Separate supervisors

·          Master / slave

·         Symmetric

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bt0069 smu bsc it Winter 2014 IInd sem assignment

[Winter 2014] ASSIGNMENT

PROGRAM BSc IT

SEMESTER SECOND

SUBJECT CODE & NAME BT0069, Discrete Mathematics

CREDIT 4 BK ID B0953 MAX. MARKS 60

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Q1. if U={a,b,c,d,e}, A={a,c,d}, B={d,e},  C={b,c,e} Evaluate the following:

(a) A¢ ´ (B - C)

(b) (AU B)’ ´ (B ÇC)

(c) (A -B) ´ (B -C)

(d) (B UC)’ ´ A

(e) (B - A) ´ C¢

Answer:

2 (i) State the principle of inclusion and exclusion.

(ii) How many arrangements of the digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 contain at least one of the patterns 289, 234 or 487? 4+6 10

Answer:

I)                 Principle of Inclusion and Exclusion

For any two sets P and Q, we have;

i) |P ﮟ Q| ≤ |P| + |Q| where |P| is the number of elements in P, and |Q| is the number elements

3 If G is a group, then

i) The identity element of G is unique.

ii) Every element in G has unique inverse in G.

iii)

For any a єG, we have (a-1)-1 = a.

iv) For all a, b є G, we have (a.b)-1 = b-1.a-1.   4x 2.5 10

Answer:  i) Let e, f be two identity elements in G. Since e is the identity, we have e.f= f.

4 (i) Define valid argument

(ii) Show that ~(P  ^Q) follows from ~ P ^ ~Q. 5+5= 10

Answer: i)

Definition

Any conclusion, which is arrived at by following the rules is called a valid conclusion and

5 (i) Construct a grammar for the language.

'L⁼{x/ xє{ ab} the number of as in x is a multiple of 3.

(ii)Find the highest type number that can be applied to the following productions:

1. S→ A0, A → 1 І 2 І B0, B → 012.

2. S → ASB І b, A → bA І c ,

3. S → bS  І bc.  5+5 10

Answer: i)

Let T = {a, b} and N = {S, A, B},

S is a starting symbol.

6 (i) Define tree with example

(ii) Prove that any connected graph with ‘n’ vertices and n -1 edges is a tree.

Answer: i)

Definition

A connected graph without circuits is called a tree.

Example

Consider the two trees G1 = (V, E1) and G2 = (V, E2) where V = {a, b, c, d, e, f, g, h, i, j}

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bt0068 smu bsc it Winter 2014 IInd sem assignment

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PROGRAM- BSc IT

SEMESTER- SECOND

SUBJECT CODE & NAME- BT0068, Computer Organization and Architecture

CREDIT- 4

BK ID- B0952

MAX. MARKS- 60

Q1. Define microoperation and explain its types.

Answer: Microoperation: Digital modules are best defined by the registers they contain and the operations that are performed on the data stored in them. The operations executed on data stored in registers are called microoperations. Arithmetic Microoperations A microoperation is an elementary operation performed with the data stored in registers. The microoperations most often encountered in digital computers are classified into four

Q2. What do you mean by bus in computer system? Explain the bus structure. 4+6

Answer: A collection of wires through which data is transmitted from one part of a computer to another. You can think of a bus as a highway on which data travels within a computer. When used in reference to personal computers, the term bus usually refers to internal bus. This is a bus that connects all the internal computer components to the CPU and main memory. There's also an expansion bus that enables expansion boards to access the CPU and

Q3.  Explain the simple instruction format with diagram and examples 6+4

Answer.

Each instruction is represented by a sequence of bits. The instruction is divided into fields, corresponding to the constituent elements of the instruction. This layout of the instruction is called Instruction Format.

Q4. Explain infinite-precision and finite-precision ten's complement.

Answer: Infinite-Precision Ten's Complement: Imagine the odometer of an automobile. It has a certain number of wheels, each with the ten digits on it. When one wheel goes from 9 to 0, the wheel immediately to the left of it advances by one position. If that wheel already showed 9, it too goes to 0 and advances the wheel to its left, etc. Now suppose we have an odometer with an infinite number of wheels. We are going to use this infinite odometer to

Q5. Explain the mapping functions between the main memory and CPU. 10

Answer.

Mapping functions

The correspondence between the main memory and CPU are specified by a mapping function. There are three standard mapping functions namely

Q6. Explain interrupt and interrupt driven I/O.

Answer: Interrupt Driven I/O: Using Program-controlled I/O requires continuous involvement of the processor in the I/O activities. It is desirable to avoid wasting processor execution time. An alternative is for the CPU to issue an I/O command to a module and then go on other work. The I/O module will then interrupt the CPU requesting service when it is ready to exchange data with the CPU. The CPU will then execute the data transfer and then resumes its former processing. Based on the use of interrupts, this techniques improves the utilization of the

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